Intel Lunar Lake-MX: mobile plans for the future
As Intel prepares for the presentation of the Meteor Lake mobile chip line, slides with architectural and technical features of the next generation processors – Lunar Lake-MX – have been leaked online. The latter will have a TDP of 8-30 W and are designed for systems with low power consumption. The Lunar Lake-MX chips are the successors to the low-cost Meteor Lake-U, which have not yet been officially released.
Intel claims that the Lunar Lake architecture was developed in conjunction with Microsoft for the efficient integration of software and hardware. The chips will have a hybrid 8-core configuration, which will include 4 productive cores (Lion Cove) and 4 energy-efficient cores (Skymont). There is also an NPU 4.0 (Neural Processing Unit) unit to accelerate the computation of AI algorithms.
The processors will feature integrated Xe2-LPG graphics with Battlemage architecture. The chips will have up to 8 Xe modules. This GPU architecture has 64 vector engines, supports Systolic AI/Super Scaling and real-time ray tracing technologies. In addition, the Lunar Lake MX GPU will support DisplayPort 1.4, HDMI 2.1, eDP1.4 and 1.5, as well as hardware support for VVC/H.266 video decoding. At its peak, the Xe2-LPG integrated graphics will be able to offer up to 3.8 TFLOPS, while the 12W TDP chip variant will have a computing performance of 2.5 TFLOPS. For comparison, Apple’s M1 integrated graphics offers ~2.6 TFLOPS, M2 – 3.6 TFLOPS, M3 – 5.1 TFLOPS.
The Lunar Lake MX will use the Memory on Package (MoP) architecture, which means that DRAM chips are placed directly on the processor substrate. This integration reduces the power consumption and overall size of the memory subsystem, as well as improves performance. The architecture supports dual-channel LPDDR5X-8533 memory. Judging by the slides, 16GB and 32GB processor variants will be available (no 8GB!).
The total size of the chip is 27.5×27 mm, and in addition to DRAM chips, two crystals will be placed on the processor base: CPU & GPU and a separate SoC, which are assembled using Faveros. It is also important to note that one of the silicon wafers will be manufactured using TSMC’s 3-nm N3B process.
As for the peripherals, it should be noted that the Lunar Lake MX series chips will support 4 PCI-E 5.0 and PCI-E 5.0 lines, as well as up to three Thunderbolt 4/USB4 ports. The processors have integrated support for WiFi-7 and Bluetooth 5.4 via the BE201 network card based on the CNVio3 interface. It is noted that Lunar Lake versions with power consumption of up to 8 W will be able to operate without an active cooling system.
An economical platform based on Lunar Lake MX processors will potentially debut in 2024. It is more likely to be the second half of the year, or even the end of the year. As for its predecessors, Meteor Lake-U, these chips with a tile structure, as well as laptops based on them, will be presented on December 14.